A conventional register circuit comprises a parallel circuit of N and P channel type transistors connected to an input terminal, a feedback loop circuit of two inverters for feeding an output signal of the parallel circuit back to an input thereof, and an output inverter connected to an output terminal for inverting an output signal of the feedback loop circuit to be supplied to the output terminal.
In operation, when a clock signal of "high" and an inverted clock signal of "low" are applied to the N and P channel transistors of the parallel circuit, respectively, the parallel circuit is turned on, so that an input signal applied to the input terminal is transmitted through the parallel circuit to the feedback loop circuit. Here, if it is assumed that a feedback inverter of the two inverters of the feedback loop circuit has a sufficient large ON resistance, the input signal is transmitted through a remaining inverter of the feedback loop circuit and the output inverter to the output terminal.
Next, when the clock signal becomes low, while the inverted clock signal becomes high, the parallel circuit is turned off, so that an input signal supplied to the parallel circuit at the time just prior to the turning-off of the parallel circuit becomes an output signal obtained at the output terminal by the function of the feedback loop circuit. At this moment, when a stop mode is instructed to be carried out, that is, the clock signal of "low" and the inverted clock signal of "high" are maintained for a predetermined time, the output signal equal to the input signal is obtained at the output terminal.
Such a register circuit is associated with large scale integrated circuit (LSI) circuit of a microprocessor, a microcomputer, etc., wherein a stop current, which is defined to be a power supply current flowing through the register circuit operating under a stop mode, must be less than a predetermined value which is prescribed in a data sheet.
The term "stop mode" refers to a situation where, an LSI is turned on and is being supplied power, but the memory stops taking in data for a brief period of time. A central processor (CPU) stops the supply of clock pulses in order to decrease current consumption. The term "stop current" refers to a leakage current which flows through the register circuit. As will become more apparent as this specification continues, a "stop current" is in a circuit traced from the power supply 10 (FIG. 4A), through transistor 8, a node at the input of invention 4, resistor 18 an insulation to ground.
For the purpose of determining register circuits to meet the requirement of the data sheet, the stop current is measured in each register circuit.
In this respect, if a stop mode is instructed to a register circuit, when an input signal supplied to the register circuit is high, a stop current flowing between an input of the feedback loop circuit and ground can be detected, because the input of the feedback loop circuit is at a high potential. As a result of measuring the stop current caused by the high potential at the input of the feedback loop circuit, the register circuit can be determined to be "good" or "fault".
However, the conventional register circuit has a disadvantage in that there is a case where a stop current can not be detected, so that a faulty register circuit becomes difficult to be sorted out from register circuits. That is, if a stop mode is instructed to a register circuit, when an input signal is low, a stop current can not flow, because a potential is low at the input of the feedback loop circuit. This makes the design of test pattern complicated and the design steps thereof large in number.